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标题: MC9S12XS128超频问题 [打印本页]

作者: new_creator 时间: 2011-3-4 17:12
标题: MC9S12XS128超频问题
我看网上的程序有人超到了总线频率120MHz，但是datasheet上写了
频率                         VCOFRQ[1:0]
32MHz-----48MHz       00
48------------80             01
reserved                      10
80-----------120             11
fpll<=fvco
fbus=fpll/2
那岂不是fbus<=60MHz,咋么超到120MHz啊？？？

作者: Livey 时间: 2011-3-14 15:08
跑到了64M 没有出现问题

作者: 读懂你的心 时间: 2011-3-14 15:33
＃i nclude <hidef.h>    /* common defines and macros */
＃i nclude <MC9S12XS128.h>    /* derivative information */
#pragma LINK_INFO DERIVATIVE "mc9s12xs128"

void delayms(int ms)
{
int ii,jj;
if (ms<1) ms=1;
for(ii=0;ii<ms;ii++)
   for(jj=0;jj<3338;jj++); //40MHz--1ms
}
void SetBusCLK_16M(void)
{
CLKSEL=0X00; // disengage PLL to system
PLLCTL_PLLON=1; // turn on PLL
SYNR=0x00 | 0x01;  // VCOFRQ[7:6];SYNDIV[5:0]
                     // fVCO= 2*fOSC*(SYNDIV + 1)/(REFDIV + 1)
                     // fPLL= fVCO/(2 × POSTDIV)
                     // fBUS= fPLL/2
                     // VCOCLK Frequency Ranges  VCOFRQ[7:6]
                     // 32MHz <= fVCO <= 48MHz 00
                     // 48MHz <  fVCO <= 80MHz 01
                     // Reserved                10
                     // 80MHz <  fVCO <= 120MHz 11
REFDV=0x80 | 0x01;  // REFFRQ[7:6];REFDIV[5:0]
                     // fREF=fOSC/(REFDIV + 1)
                     // REFCLK Frequency Ranges  REFFRQ[7:6]
                     // 1MHz <= fREF <=  2MHz    00
                     // 2MHz <  fREF <=  6MHz    01
                     // 6MHz <  fREF <= 12MHz    10
                     // fREF >  12MHz             11
                     // pllclock=2*osc*(1+SYNR)/(1+REFDV)=32MHz;
POSTDIV=0x00;    // 4:0, fPLL= fVCO/(2xPOSTDIV)
                     // If POSTDIV = $00 then fPLL is identical to fVCO (divide by one).
_asm(nop);       // BUS CLOCK=16M
_asm(nop);
while(!(CRGFLG_LOCK==1)); //when pll is steady ,then use it;
CLKSEL_PLLSEL =1;       //engage PLL to system;
}
void SetBusCLK_32M(void)
{
CLKSEL=0X00; // disengage PLL to system
PLLCTL_PLLON=1; // turn on PLL
SYNR =0x40 | 0x03;  // pllclock=2*osc*(1+SYNR)/(1+REFDV)=64MHz;
REFDV=0x80 | 0x01;
POSTDIV=0x00;
_asm(nop);       // BUS CLOCK=32M
_asm(nop);
while(!(CRGFLG_LOCK==1)); //when pll is steady ,then use it;
CLKSEL_PLLSEL =1;       //engage PLL to system;
}
void SetBusCLK_40M(void)
{
CLKSEL=0X00; //disengage PLL to system
PLLCTL_PLLON=1; //turn on PLL
SYNR =0xc0 | 0x04;
REFDV=0x80 | 0x01;
POSTDIV=0x00;    //pllclock=2*osc*(1+SYNR)/(1+REFDV)=80MHz;
_asm(nop);       //BUS CLOCK=40M
_asm(nop);
while(!(CRGFLG_LOCK==1)); //when pll is steady ,then use it;
CLKSEL_PLLSEL =1;       //engage PLL to system;
}
void SetBusCLK_48M(void)
{
CLKSEL=0X00; //disengage PLL to system
PLLCTL_PLLON=1; //turn on PLL
SYNR =0xc0 | 0x05;
REFDV=0x80 | 0x01;
POSTDIV=0x00;    //pllclock=2*osc*(1+SYNR)/(1+REFDV)=96MHz;
_asm(nop);       //BUS CLOCK=48M
_asm(nop);
while(!(CRGFLG_LOCK==1)); //when pll is steady ,then use it;
CLKSEL_PLLSEL =1;       //engage PLL to system;
}
void SetBusCLK_64M(void)
{
CLKSEL=0X00; //disengage PLL to system
PLLCTL_PLLON=1; //turn on PLL
SYNR =0xc0 | 0x07;
REFDV=0x80 | 0x01;
POSTDIV=0x00;    //pllclock=2*osc*(1+SYNR)/(1+REFDV)=128MHz;
_asm(nop);       //BUS CLOCK=64M
_asm(nop);
while(!(CRGFLG_LOCK==1)); //when pll is steady ,then use it;
CLKSEL_PLLSEL =1;       //engage PLL to system;
}
void SetBusCLK_80M(void)
{
CLKSEL=0X00; //disengage PLL to system
PLLCTL_PLLON=1; //turn on PLL
SYNR =0xc0 | 0x09;
REFDV=0x80 | 0x01;
POSTDIV=0x00;    //pllclock=2*osc*(1+SYNR)/(1+REFDV)=160MHz;
_asm(nop);       //BUS CLOCK=80M
_asm(nop);
while(!(CRGFLG_LOCK==1)); //when pll is steady ,then use it;
CLKSEL_PLLSEL =1;       //engage PLL to system;
}
void SetBusCLK_88M(void)
{
CLKSEL=0X00; //disengage PLL to system
PLLCTL_PLLON=1; //turn on PLL
SYNR =0xc0 | 0x0a;
REFDV=0x80 | 0x01;
POSTDIV=0x00;    //pllclock=2*osc*(1+SYNR)/(1+REFDV)=176MHz;
_asm(nop);       //BUS CLOCK=88M
_asm(nop);
while(!(CRGFLG_LOCK==1)); //when pll is steady ,then use it;
CLKSEL_PLLSEL =1;       //engage PLL to system;
}
void SetBusCLK_96M(void)
{
CLKSEL=0X00; //disengage PLL to system
PLLCTL_PLLON=1; //turn on PLL
SYNR =0xc0 | 0x0b;
REFDV=0x80 | 0x01;
POSTDIV=0x00;    //pllclock=2*osc*(1+SYNR)/(1+REFDV)=192MHz;
_asm(nop);       //BUS CLOCK=96M
_asm(nop);
while(!(CRGFLG_LOCK==1)); //when pll is steady ,then use it;
CLKSEL_PLLSEL =1;       //engage PLL to system;
}
void SetBusCLK_104M(void)
{
CLKSEL=0X00; //disengage PLL to system
PLLCTL_PLLON=1; //turn on PLL
SYNR =0xc0 | 0x0c;
REFDV=0x80 | 0x01;
POSTDIV=0x00;    //pllclock=2*osc*(1+SYNR)/(1+REFDV)=208MHz;
_asm(nop);       //BUS CLOCK=104M
_asm(nop);
while(!(CRGFLG_LOCK==1)); //when pll is steady ,then use it;
CLKSEL_PLLSEL =1;       //engage PLL to system;
}
void SetBusCLK_120M(void)
{
CLKSEL=0X00; //disengage PLL to system
PLLCTL_PLLON=1; //turn on PLL
SYNR =0xc0 | 0x0d;
REFDV=0x80 | 0x01;
POSTDIV=0x00;    //pllclock=2*osc*(1+SYNR)/(1+REFDV)=240MHz;
_asm(nop);       //BUS CLOCK=120M
_asm(nop);
while(!(CRGFLG_LOCK==1)); //when pll is steady ,then use it;
CLKSEL_PLLSEL =1;       //engage PLL to system;
}
void main(void) {
  /* put your own code here */
  unsigned char LedCnt=0;

  SetBusCLK_96M(); // 此处选择待设定的总线频率
  DDRB=0xff;
  DDRA=0x01;
  PORTA=0XFE;
  PORTB=0XFE;

  EnableInterrupts;

  for(;;) {

LedCnt=(LedCnt>0XFE?0:++LedCnt);
delayms(500); // 修改延时以修改数据发送频率

//低电平灯亮用这句,注释掉下面那句
PORTB=~LedCnt;       // 测试清华版系统板
PORTA_PA0=~PORTA_PA0;  // 测试龙丘最小系统板
//PORTB_BIT7=~PORTB_BIT7;
//高电平灯亮用这句,注释掉上面那句
//PORTB=LedCnt;

  } /* wait forever */
  /* please make sure that you never leave this */
}

作者: 读懂你的心 时间: 2011-3-14 15:35
因为这两个寄存器是用这种方式设置的SYNR=0x00 | 0x01; REFDV=0x80 | 0x01;
所以没问题，可以超频

作者: 810215729 时间: 2011-11-8 08:25
回复 4# 读懂你的心

非常感谢

作者: hyshallow0 时间: 2012-5-2 20:43
这样会照成不稳定吗？

作者: dσиg 时间: 2012-5-22 10:14

读懂你的心发表于 2011-3-14 15:33
＃i nclude /* common defines and macros */
＃i nclude /* derivative information */
#pra ...

感谢！！

作者: 紫藤风信子 时间: 2012-5-22 22:43

作者: silence2455 时间: 2012-10-25 16:24

读懂你的心发表于 2011-3-14 15:35
因为这两个寄存器是用这种方式设置的SYNR=0x00 | 0x01; REFDV=0x80 | 0x01;
所以没 ...

为什么这样设置就没问题啊？

作者: puyangang 时间: 2012-10-26 13:05
好像XS128基本都是超频到80M的还没见过超频到120M呢

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