• Up to 60 MIPS at 60MHz core frequency
• DSP and MCU functionality in a unified,
C-efficient architecture
• Access up to 1MB of off-chip program and data memory
• Chip Select Logic for glueless interface to ROM and
SRAM
• 128KB of Program Flash
• 4KB of Program RAM
• 8KB of Data Flash
• 8KB of Data RAM
• 8KB of Boot Flash
• Up to two 6-channel PWM Modules
• Four 4-channel, 12-bit ADCs
• Temperature Sensor
• Up to two Quadrature Decoders
• Optional On-Chip Regulator
• FlexCAN module
• Two Serial Communication Interfaces (SCIs)
• Up to two Serial Peripheral Interfaces (SPIs)
• Up to four general-purpose Quad Timers
• Computer Operating Properly (COP) / Watchdog
• JTAG/Enhanced On-Chip Emulation (OnCE™) for
unobtrusive, real-time debugging
• Up to 62 GPIO lines
• 144-pin LQFP Package