When PAEN is set, the PACT is enabled.The PACT shares the input pin with IOC7. 要注意的是这里的paen要置1,同时脉冲输入口,要接入到ioc7也就是说pt7接口 详细解释下: 6
PAEN Pulse Accumulator System Enable — PAEN is independent from TEN. With timer disabled, the pulse
accumulator can function unless pulse accumulator is disabled. 0 16-Bit Pulse Accumulator system disabled. 1 Pulse Accumulator system enabled. 打开脉冲计数,需要 5
PAMOD Pulse Accumulator Mode — This bit is active only when the Pulse Accumulator is enabled (PAEN = 1). 0 Event counter mode.
事件触发计数 也就是外面有脉冲来就计数,需要 1 Gated time accumulation mode.
门控时间累加方式。简单的说就是统计输入脚的高或低电平持续的时间clock数目。 4
PEDGE Pulse Accumulator Edge Control—This bit is active only when the Pulse Accumulator is enabled (PAEN = 1). For PAMOD bit = 0 (event counter mode). See Table 16-18. 0 Falling edges on IOC7 pin cause the count to be incremented. 下降沿 1 Rising edges on IOC7 pin cause the count to be incremented. 上升沿 这个无所谓了。 3:2 CLK[1:0] Clock Select Bits — Refer to Table 16-19. 门控时间计数方式有效。 1
PAOVI Pulse Accumulator Overflow Interrupt Enable 0 Interrupt inhibited. 1 Interrupt requested if PAOVF is set. 溢出中断是否有效 0
PAI Pulse Accumulator Input Interrupt Enable 0 Interrupt inhibited. 1 Interrupt requested if PAIF is set. 输入中断是否有效 明白上述各种含义代码如下 代码如下: PACTL = 0x40; //脉冲计数 下降沿 // Pulse Accumulators Count Registers (PACNT) PACNT = 0x0000; //清0计数器 |