改了一上午的PWM的子函数，带参数（通道，频率）占空比默认50%

信雪神话 · 发表于 2013-2-23 18:14:01

XS128的！

void PWM_Fun(uchar n,uint f)
{

PWMPRCLK_PCKA2=1;
PWMPRCLK_PCKA1=1;
PWMPRCLK_PCKA0=0;//总线时钟64分频，即1M Hz

PWMSCLA=5;//时钟为1000000/2*5=100 000 Hz

PWMCAE=0X00;//均为左对齐

switch (n)
{
case 0

WME_PWME0=0;
PWMPOL|=0X01;//先输出高电平
PWMCLK|=0X01;//选时钟SA，已64分频即1M。
switch(f)
{
case 2500 :PWMPER0=40

WMDTY0=20;break;//占空比等于PWMDTYx/PWMPERx
case 2000 :PWMPER0=50 ;PWMDTY0=25;break;
case 1250 :PWMPER0=80 ;PWMDTY0=40;break;
case 1000 :PWMPER0=100;PWMDTY0=40;break;
case 800 :PWMPER0=125;PWMDTY0=60;break;
case 625 :PWMPER0=160;PWMDTY0=80;break;
}

PWME|=0X01; //通道使能
break;

case 1:PWME_PWME1=0;
PWMPOL|=0X02;
PWMCLK|=0X02;
switch(f)
{
case 2500 :PWMPER1=40 ;PWMDTY1=20;break;
case 2000 :PWMPER1=50 ;PWMDTY1=25;break;
case 1250 :PWMPER1=80 ;PWMDTY1=40;break;
case 1000 :PWMPER1=100;PWMDTY1=40;break;
case 800 :PWMPER1=125;PWMDTY1=60;break;
case 625 :PWMPER1=160;PWMDTY1=80;break;
}

PWME|=0X02;
break;

case 4:PWME_PWME4=0;
PWMPOL|=0X10;
PWMCLK|=0X10;
switch(f)
{
case 2500 :PWMPER4=40 ;PWMDTY4=20;break;
case 2000 :PWMPER4=50 ;PWMDTY4=25;break;
case 1250 :PWMPER4=80 ;PWMDTY4=40;break;
case 1000 :PWMPER4=100;PWMDTY4=50;break;
case 800 :PWMPER4=125;PWMDTY4=60;break;
case 625 :PWMPER4=160;PWMDTY4=80;break;
}

PWME|=0X10;
break;

case 5:PWME_PWME5=0;
PWMPOL|=0X20;
PWMCLK|=0X20;
switch(f)
{
case 2500 :PWMPER5=40 ;PWMDTY5=20;break;
case 2000 :PWMPER5=50 ;PWMDTY5=25;break;
case 1250 :PWMPER5=80 ;PWMDTY5=40;break;
case 1000 :PWMPER5=100;PWMDTY5=50;break;
case 800 :PWMPER5=125;PWMDTY5=60;break;
case 625 :PWMPER5=160;PWMDTY5=80;break;
}

PWME|=0X20;
break;

}

}

信雪神话 · 发表于 2013-2-23 18:15:02

busclock！！

void jingzhen(unsigned int pinl)
{
CLKSEL=0X00;
PLLCTL=0XE1;
  switch (pinl)
  {
  case 8:break;
  case 11:SYNR=0x00 | 0x07;REFDV=0x80|0x0a;break;
  case 16:SYNR=0x00 | 0x01;REFDV=0x80|0x01;break;
  case 24:SYNR=0x00 | 0x02;REFDV=0x80|0x01;break;
  case 32:SYNR=0x00 | 0x03;REFDV=0x80|0x01;break;
  case 40:SYNR=0x00 | 0x04;REFDV=0x80|0x01;break;
  case 48:SYNR=0x40 | 0x05;REFDV=0x80|0x01;break;
  case 56:SYNR=0x40 | 0x06;REFDV=0x80|0x01;break;
  case 64:SYNR=0x40 | 0x07;REFDV=0x80|0x01;break;
  case 72:SYNR=0x40 | 0x08;REFDV=0x80|0x01;break;
  case 80:SYNR=0xc0 | 0x09;REFDV=0x80|0x01;break;
  case 88:SYNR=0xc0 | 0x0a;REFDV=0x80|0x01;break;
  case 96:SYNR=0xc0 | 0x0b;REFDV=0x80|0x01;break;
  default:break;
  }
PLLCTL=0X60;
POSTDIV=0x00;
asm NOP;
asm NOP;
asm NOP;
while(!(CRGFLG_LOCK==1));
CLKSEL=0X80;
}