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- 2012-4-21
- 在线时间
- 2 小时
- 毕业学校
- 北京工商大学
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#include <hidef.h> /* common defines and macros */
#include "derivative.h" /* derivative-specific definitions */
void PWM_Init(void){
PWME = 0x00; //禁止PWM输出
PWMPOL = 0x00; //PWM输出起始为低电平
PWMPRCLK = 0x25; //ClockB=Bus/4=8MHz, ClockA=Bus/32=1MHz 00100101 对时钟A,B分频
PWMSCLA = 1; //ClockSA=ClockA/(1*2)=500kHz Clock SA=Clock A /(2*PWMSCLA)
PWMSCLB = 1; //ClockSB=ClockB/(1*2)=500kHz Clock SB=Clock B /(2*PWMSCLB)
PWMCLK = 0xFF; //时钟来源选择ClockSA、ClockSB
PWMCAE = 0x00; //左对齐方式
PWMCTL = 0xF0; //通道01 23 45 67级联
PWMPER01 = 5000; //输出周期=(1/500kHz)x(10000)= 20MS PWMx周期=通道时钟周期*PWMPERx
PWMPER45 = 10000; //输出周期=(1/500kHz)x(10000)=20ms
PWMPER23 = 25000; //输出周期=(1/4MHz)x(1000)= ms 4kHz
PWMPER67 = 10000; //输出周期=(1/4MHz)x(1000)=
PWMDTY01 = 2500; //占空比=[(PWMPERx-PWMDTYx)/(PWMPERx)]x100%=
PWMDTY45 = 2000; //占空比=[(PWMPERx-PWMDTYx)/(PWMPERx)]x100%=
PWMDTY23 = 12500;
PWMDTY67 = 800;
PWME=0xAA; //01级联模块初始化 00001000
}
void SetBusClock(void)
{
CLKSEL=0x00; //disengage PLL to system
PLLCTL_PLLON=1; //turn on PLL
SYNR =0x40 | 0x03; // VCOFRQ[7:6];SYNDIV[5:0]; //SYNR=0xc0|0x09可以超频到80MHZ
REFDV=0x80 | 0x01; // REFFRQ[7:6];REFDIV[5:0]
POSTDIV=0x00;
//fVCO= 2*fOSC*(SYNDIV + 1)/(REFDIV + 1);fPLL= fVCO/(2 × POSTDIV);
//BUS= fPLL/2
//if POSTDIV=0, fPLL= fVCO
_asm(nop); //BUS CLOCK=32M
_asm(nop);
while(!(CRGFLG_LOCK==1)); //when pll is steady ,then use it;
CLKSEL_PLLSEL =1; //engage PLL to system;
}
void main(){
SetBusClock();
PWM_Init();
for(;;) {
};
}
我觉得 1 3 5 7 引脚都应该有相应的波形输出 但是只有1口能出波形 3 5 7 都没有 高手麻烦告知一下 太谢谢您
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