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void FTM0_Init(void)
{
//SIM->SCGC5 |=SIM_SCGC5_PORTA_MASK;
SIM->SCGC5 |= SIM_SCGC5_PORTC_MASK; /* Enable PORTC gate clocking */
SIM->SCGC6|=SIM_SCGC6_FTM0_MASK; //Enable the Clock to the FTM0 Module
PORTC->PCR[4] = PORT_PCR_MUX(0x04); //FTM0_CH3
PORTC->PCR[2] = PORT_PCR_MUX(0x04); //FTM0_CH1
FTM0->OUTMASK=0x00;
FTM0->MODE |= FTM_MODE_WPDIS_MASK; //Disable Write Protection - enables changes to QUADEN, DECAPEN, etc.
FTM0->MODE &=~ FTM_MODE_FTMEN_MASK; //FTMEN is bit 0, need to set to zero so DECAPEN can be set to 0
FTM0->QDCTRL &=~FTM_QDCTRL_QUADEN_MASK; //Set Edge Aligned PWM QUADEN is Bit 1, Set Quadrature Decoder Mode (QUADEN) Enable to 0, (disabled)
/*设置FTM0模式:设置为边沿PWM模式*/
FTM0->CONTROLS[1].CnSC &=~FTM_CnSC_ELSA_MASK; //Edge or level Select
FTM0->CONTROLS[1].CnSC |= FTM_CnSC_MSB_MASK|FTM_CnSC_ELSB_MASK; //Channel Mode select
FTM0->CONTROLS[3].CnSC &=~FTM_CnSC_ELSA_MASK; //Edge or level Select
FTM0->CONTROLS[3].CnSC |= FTM_CnSC_MSB_MASK|FTM_CnSC_ELSB_MASK; //Channel Mode select
/*占空比=CnV/(MOD+1) PMW频率=系统频率/2/(2^FTM1_SC_PS)/FTM1_MOD */
FTM0->CNT = 0; //FTM Counter Value - reset counter to zero
FTM0->MOD =1125 ; //设置周期 1125
FTM0->CNTIN = 0; //Set the Counter Initial Value to 0
FTM0->SC = 0; //Make sure its Off!
FTM0->CONTROLS[1].CnV=0;
FTM0->CONTROLS[3].CnV=0;
FTM0->SC |= FTM_SC_CLKS(1); // Selects Clock source to be "system clock"
/*
000 - 0 - No divide
001 - 1 - Divide by 2
010 - 2 - Divide by 4
011 - 3 - Divide by 8
100 - 4 - Divide by 16
101 - 5 - Divide by 32
110 - 6 - Divide by 64
111 - 7 - Divide by 128
*/
FTM0->SC |= FTM_SC_PS(3); //sets pre-scale value see details below No divide 8分频
}
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