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//lptmr.h
#ifndef _LPTMR_H_
#define _LPTMR_H_
void lptmr_cnt0_init(void);
void lptmr_cnt1_init(void);
void cnt0_cnt1_enable(void);
void enable_lptmr_interrupt(void);
void disable_lptmr_interrupt(void);
#endif
//lptmr.c
#include "common.h"
#include "lptmr.h"
char LPTMR_INTERRUPT; //Global flag variable
void lptmr_cnt0_init(void)
{
unsigned int cmp_value=65535;
SIM_SCGC5 |= SIM_SCGC5_PORTA_MASK | SIM_SCGC5_PORTB_MASK | SIM_SCGC5_PORTC_MASK | SIM_SCGC5_PORTD_MASK | SIM_SCGC5_PORTE_MASK;
SIM_SCGC5|=SIM_SCGC5_LPTIMER_MASK;
LPTMR0_PSR = LPTMR_PSR_PCS(0x1)|LPTMR_PSR_PBYP_MASK; //LPO clock , bypass glitch filter
LPTMR0_CMR = LPTMR_CMR_COMPARE(cmp_value);
LPTMR0_CSR = LPTMR_CSR_TPS(0x1)|LPTMR_CSR_TMS_MASK|~LPTMR_CSR_TFC_MASK|~LPTMR_CSR_TIE_MASK|LPTMR_CSR_TCF_MASK;
LPTMR0_CSR &= ~LPTMR_CSR_TEN_MASK;
SIM_SCGC5 |= SIM_SCGC5_PORTA_MASK;
PORTA_PCR19=PORT_PCR_MUX(0x6); //PTA19
}
void lptmr_cnt1_init(void)
{
unsigned int cmp_value=1000;
SIM_SCGC5 |= SIM_SCGC5_PORTA_MASK | SIM_SCGC5_PORTB_MASK | SIM_SCGC5_PORTC_MASK | SIM_SCGC5_PORTD_MASK | SIM_SCGC5_PORTE_MASK;
SIM_SCGC5|=SIM_SCGC5_LPTIMER_MASK;
LPTMR0_PSR=LPTMR_PSR_PCS(0x1)|LPTMR_PSR_PBYP_MASK; //LPO clock , bypass glitch filter
LPTMR0_CMR=LPTMR_CMR_COMPARE(cmp_value);
LPTMR0_CSR = LPTMR_CSR_TPS(0x2)|LPTMR_CSR_TMS_MASK;
LPTMR0_CSR |= LPTMR_CSR_TCF_MASK;
LPTMR0_CSR &=~(LPTMR_CSR_TFC_MASK | LPTMR_CSR_TIE_MASK);
LPTMR0_CSR &= ~LPTMR_CSR_TEN_MASK;
PORTC_PCR5=PORT_PCR_MUX(0x4); // PTC5
}
void enable_lptmr_interrupt(void)
{
enable_irq(85);
}
void disable_lptmr_interrupt(void)
{
disable_irq(85);
}
void cnt0_cnt1_enable(void)
{
LPTMR0_CSR|= LPTMR_CSR_TEN_MASK;
}
//pit0_interrupt
void lptmr_cnt0_init(void)
{
unsigned int cmp_value=65535;
SIM_SCGC5 |= SIM_SCGC5_PORTA_MASK | SIM_SCGC5_PORTB_MASK | SIM_SCGC5_PORTC_MASK | SIM_SCGC5_PORTD_MASK | SIM_SCGC5_PORTE_MASK;
SIM_SCGC5|=SIM_SCGC5_LPTIMER_MASK;
LPTMR0_PSR = LPTMR_PSR_PCS(0x1)|LPTMR_PSR_PBYP_MASK; //LPO clock , bypass glitch filter
LPTMR0_CMR = LPTMR_CMR_COMPARE(cmp_value);
LPTMR0_CSR = LPTMR_CSR_TPS(0x1)|LPTMR_CSR_TMS_MASK|~LPTMR_CSR_TFC_MASK|~LPTMR_CSR_TIE_MASK|LPTMR_CSR_TCF_MASK;
LPTMR0_CSR &= ~LPTMR_CSR_TEN_MASK;
SIM_SCGC5 |= SIM_SCGC5_PORTA_MASK;
PORTA_PCR19=PORT_PCR_MUX(0x6); //PTA19
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