pwm模块主程序调试，谁能解释一下哪个端口输出方波？

martain · 发表于 2012-4-17 22:39:45

/********************************************************
【平台】龙丘CORTEX-M4开发板/系统板
【编写】龙丘
【Designed】by Chiu Sir
【E-mail  】chiusir@yahoo.cn
【软件版本】V1.0
【最后更新】2011年12月25日
【相关信息参考下列地址】
【网站】http://www.lqist.cn
【淘宝店铺】http://shop36265907.taobao.com
【dev.env.】Code Warrior 10.1
【Target  】CORTEX-M4
【Crystal 】50.000Mhz
【busclock】50.000MHz
【pllclock】 ?MHz
------------------------------------------------
------------------------------------------------
使用说明: FTM1定时器PWM输出
使用PORTA BIT14,15,16,17流水灯程序
FTM1CH0；PTA8
管脚参考K60P144M100SF2.pdf  P.70
用示波器查看PTA8管脚波形输出
或者用杜邦线将PTA8接到PTA16,或者PTA17就可以看到LED逐渐亮灭
*********************************************************/
#include "MK60N512VMD100.h " /* include peripheral declarations */
#include "includes.h"
#define GPIO_PIN_MASK    0x1Fu //0x1f=31,限制位数为0--31有效
#define GPIO_PIN(x)       (((1)<<(x & GPIO_PIN_MASK)))  //把当前位置1
//give some delay~~
void delay()
{
int i =0;
int j=0;
for(i=0;i<2000;i++)
for(j=0;j<1000;j++)
   asm("nop");
}
void delay2()
{
int i =0;
int j=0;
for(i=0;i<100;i++)
for(j=0;j<1000;j++)
   asm("nop");
}
//==========================================================================
//函数名称: hw_FTM1_init
//函数返回: 无
//参数说明: FTM1no:表示FTM1通道号。
// timeout:表示定时溢出开始递减的值
//功能概要: 设置相关寄存器的值
//==========================================================================
void hw_FTM1_init(void);
//头文件
#include "includes.h"
void pllinit60M(void);
void pllinit80M(void);
void pllinit100M(void);
void pllinit125M(void);
void pllinit1375M(void);
//锁相环频率为50/19*55=144.7386421M测试函数
void pllinit144M(void);
//锁相环频率为50/18*54=150M测试函数
void pllinit150M(void);
//锁相环频率为50/16*54=168.75M测试函数
void pllinit168d75M(void);
//锁相环频率为50/15*54=180M测试函数
void pllinit180M(void);
//锁相环频率为50/13*54=207.7M测试函数
void pllinit207M(void);
//锁相环频率为50/13*55=211M测试函数
void pllinit211M(void);
//锁相环频率为50/12*54=225M测试函数
void pllinit225M(void);
//全局变量声明
void main(void)
{
uint16 i=0;

      pllinit125M();//设置系统主频率
//开启各个GPIO口的转换时钟
SIM_SCGC5 = SIM_SCGC5_PORTA_MASK | SIM_SCGC5_PORTB_MASK | SIM_SCGC5_PORTC_MASK | SIM_SCGC5_PORTD_MASK | SIM_SCGC5_PORTE_MASK;
//关中断
      DisableInterrupts;          //禁止总中断
      //初始化FTM1，
      //hw_FTM1_init2(1000,2000);
      hw_FTM1_init();
      //EnableInterrupts;    //开总中断
//设置PORTA pin14,pin15为GPIO口
PORTA_PCR14=(0|PORT_PCR_MUX(1));
PORTA_PCR15=(0|PORT_PCR_MUX(1));
PORTA_PCR16=(0|PORT_PCR_MUX(1));
PORTA_PCR17=(0|PORT_PCR_MUX(1));

//设置PORTA pin14,pin15为输出方向;pin16,pin17为输入方向
GPIOA_PDDR=GPIO_PDDR_PDD(GPIO_PIN(14)|GPIO_PIN(15));
GPIOA_PDOR &= ~GPIO_PDOR_PDO(GPIO_PIN(14)|GPIO_PIN(15)); //先读取，然后才能输出
for(;;)
{
            GPIOA_PDOR &= ~GPIO_PDOR_PDO(GPIO_PIN(15)); //IO口输出低电平，亮
  delay();delay();//暂停

            GPIOA_PDOR |=  GPIO_PDOR_PDO(GPIO_PIN(15)); //IO口输出高电平，灭
  delay();delay();//暂停
            for(i=1000;i>1;i-=1)
            {
                  FTM1_C0V=i;  //改变占空比，逐渐变大
                  delay2();//暂停
            }
  //用户添加自己的代码
}
}

/*==========================================================================
FTM1c0 PWM输出初始化函数
The edge-aligned mode is selected when (QUADEN = 0), (DECAPEN = 0), (COMBINE
= 0), (CPWMS = 0), and (MSnB = 1).
K60P144M100SF2RM.pdf  P1011 39.4.6 Edge-Aligned PWM (EPWM) Mode
The EPWM period is determined by (MOD - CNTIN + 0x0001) and the pulse width
(duty cycle) is determined by (CnV - CNTIN).
//==========================================================================*/
void hw_FTM1_init(void)
{
   //SIM_SOPT4|=SIM_SOPT4_FTM1FLT0_MASK;
   /* Turn on all port clocks */
   SIM_SCGC5 |= SIM_SCGC5_PORTA_MASK;

   /* Enable the function on PTA8 */
   PORTA_PCR8 = PORT_PCR_MUX(0x3)| PORT_PCR_DSE_MASK;; // FTM is alt3 function for this pin

   SIM_SCGC6|=SIM_SCGC6_FTM1_MASK;       //使能FTM1时钟

   //change MSnB = 1
   FTM1_C0SC |= FTM_CnSC_ELSB_MASK;
   FTM1_C0SC &= ~FTM_CnSC_ELSA_MASK;
   FTM1_C0SC |= FTM_CnSC_MSB_MASK;

   //FTM1_SC = FTM_SC_PS(0) | FTM_SC_CLKS(1);
   //FTM1_SC=0X0F;
   FTM1_SC = 0x28; //not enable the interrupt mask
   //FTM1_SC=0X1F;    //BIT5  0 FTM counter operates in up counting mode.
                        //1 FTM counter operates in up-down counting mode.
   //BIT43 FTM1_SC|=FTM1_SC_CLKS_MASK;
                        //00 No clock selected (This in effect disables the FTM counter.)
                        //01 System clock
                        //10 Fixed frequency clock
                        //11 External clock
   //BIT210 FTM1_SC|=FTM1_SC_PS_MASK;
                        //100M       MOD=2000;    MOD=4000; MOD=1000;
                        //000 Divide by 1---12KHZ    6K       24k
                        //001 Divide by 2--- 6KHZ
                        //010 Divide by 4--- 3K
                        //011 Divide by 8--- 1.5K
                        //100 Divide by 16---750
                        //101 Divide by 32---375
                        //110 Divide by 64---187.5HZ
                        //111 Divide by 128--93.75hz

   FTM1_MODE |= FTM_MODE_WPDIS_MASK;
   //BIT1 Initialize the Channels Output
   //FTMEN is bit 0, need to set to zero so DECAPEN can be set to 0
   FTM1_MODE &= ~1;
   //BIT0 FTM Enable
   //0 Only the TPM-compatible registers (first set of registers) can be used without any restriction. Do not use the FTM-specific registers.
   //1 All registers including the FTM-specific registers (second set of registers) are available for use with no restrictions.

   FTM1_OUTMASK=0XFE; //0 Channel output is not masked. It continues to operate normally.
                        //1 Channel output is masked. It is forced to its inactive state.

   FTM1_COMBINE=0;    //Function for Linked Channels (FTMx_COMBINE)
   FTM1_OUTINIT=0;
   FTM1_EXTTRIG=0;    //FTM External Trigger (FTMx_EXTTRIG)
   FTM1_POL=0;       //Channels Polarity (FTMx_POL)
                        //0 The channel polarity is active high.
                        //1 The channel polarity is active low.
   //Set Edge Aligned PWM
   FTM1_QDCTRL &=~FTM_QDCTRL_QUADEN_MASK;
   //QUADEN is Bit 1, Set Quadrature Decoder Mode (QUADEN) Enable to 0, (disabled)
   //FTM0_SC = 0x16; //Center Aligned PWM Select = 0, sets FTM Counter to operate in up counting mode,
   //it is field 5 of FTMx_SC (status control) - also setting the pre-scale bits here

   FTM1_INVCTRL=0;    //反转控制
   FTM1_SWOCTRL=0;    //软件输出控制F TM Software Output Control (FTMx_SWOCTRL)
   FTM1_PWMLOAD=0;    //FTM PWM Load
                        //BIT9: 0 Loading updated values is disabled.
                        //1 Loading updated values is enabled.
   FTM1_CNTIN=0;       //Counter Initial Value
   FTM1_MOD=1000;    //Modulo value,The EPWM period is determined by (MOD - CNTIN + 0x0001)
                        //采用龙丘时钟初始化函数，可以得到4分频的频率，系统60M频率时，PWM频率是15M,以此类推
                        //PMW频率=X系统频率/4/(2^FTM1_SC_PS)/FTM1_MOD
   FTM1_C0V=500;       //设置 the pulse width(duty cycle) is determined by (CnV - CNTIN).
   FTM1_CNT=0;       //只有低16位可用
}
//锁相环频率为50/12*54=225M测试函数
void pllinit225M(void)
{
uint32_t temp_reg;
      //使能IO端口时钟
SIM_SCGC5 |= (SIM_SCGC5_PORTA_MASK
                           | SIM_SCGC5_PORTB_MASK
                           | SIM_SCGC5_PORTC_MASK
                           | SIM_SCGC5_PORTD_MASK
                           | SIM_SCGC5_PORTE_MASK );
//这里处在默认的FEI模式
//首先移动到FBE模式
MCG_C2 = 0;
//MCG_C2 = MCG_C2_RANGE(2) | MCG_C2_HGO_MASK | MCG_C2_EREFS_MASK;
//初始化晶振后释放锁定状态的振荡器和GPIO
SIM_SCGC4 |= SIM_SCGC4_LLWU_MASK;
LLWU_CS |= LLWU_CS_ACKISO_MASK;

//选择外部晶振，参考分频器，清IREFS来启动外部晶振
//011 If RANGE = 0, Divide Factor is 8; for all other RANGE values, Divide Factor is 256.
MCG_C1 = MCG_C1_CLKS(2) | MCG_C1_FRDIV(3);

//等待晶振稳定
//while (!(MCG_S & MCG_S_OSCINIT_MASK)){}             //等待锁相环初始化结束
while (MCG_S & MCG_S_IREFST_MASK){}                //等待时钟切换到外部参考时钟
while (((MCG_S & MCG_S_CLKST_MASK) >> MCG_S_CLKST_SHIFT) != 0x2){}

//进入FBE模式,
//0x18==25分频=2M,
//0x08==15分频=3.333M
//0x09==16分频=3.125M,
//0x10==17分频=2.94M
//0x11==18分频=2.7778M
//0x12==19分频=2.63M,
//0x13==20分频=2.5M
MCG_C5 = MCG_C5_PRDIV(0x0b);

//确保MCG_C6处于复位状态，禁止LOLIE、PLL、和时钟控制器，清PLL VCO分频器
MCG_C6 = 0x0;

//保存FMC_PFAPR当前的值
temp_reg = FMC_PFAPR;

//通过M&PFD置位M0PFD来禁止预取功能
FMC_PFAPR |= FMC_PFAPR_M7PFD_MASK | FMC_PFAPR_M6PFD_MASK | FMC_PFAPR_M5PFD_MASK
                  | FMC_PFAPR_M4PFD_MASK | FMC_PFAPR_M3PFD_MASK | FMC_PFAPR_M2PFD_MASK
                  | FMC_PFAPR_M1PFD_MASK | FMC_PFAPR_M0PFD_MASK;
///设置系统分频器
//MCG=PLL, core = MCG, bus = MCG/3, FlexBus = MCG/3, Flash clock= MCG/9
SIM_CLKDIV1 = SIM_CLKDIV1_OUTDIV1(0) | SIM_CLKDIV1_OUTDIV2(2)
               | SIM_CLKDIV1_OUTDIV3(2) | SIM_CLKDIV1_OUTDIV4(8);

//从新存FMC_PFAPR的原始值
FMC_PFAPR = temp_reg;

//设置VCO分频器，使能PLL为100MHz, LOLIE=0, PLLS=1, CME=0, VDIV=26
MCG_C6 = MCG_C6_PLLS_MASK | MCG_C6_VDIV(30);  //VDIV = 31 (x54)
                                                //VDIV = 26 (x50)
while (!(MCG_S & MCG_S_PLLST_MASK)){}; // wait for PLL status bit to set
while (!(MCG_S & MCG_S_LOCK_MASK)){}; // Wait for LOCK bit to set

//进入PBE模式
//通过清零CLKS位来进入PEE模式
// CLKS=0, FRDIV=3, IREFS=0, IRCLKEN=0, IREFSTEN=0
MCG_C1 &= ~MCG_C1_CLKS_MASK;

//等待时钟状态位更新
while (((MCG_S & MCG_S_CLKST_MASK) >> MCG_S_CLKST_SHIFT) != 0x3){};
//SIM_CLKDIV2 |= SIM_CLKDIV2_USBDIV(1);

//设置跟踪时钟为内核时钟
SIM_SOPT2 |= SIM_SOPT2_TRACECLKSEL_MASK;
//在PTA6引脚上使能TRACE_CLKOU功能
PORTA_PCR6 = ( PORT_PCR_MUX(0x7));
//使能FlexBus模块时钟
SIM_SCGC7 |= SIM_SCGC7_FLEXBUS_MASK;
//在PTA6引脚上使能FB_CLKOUT功能
PORTC_PCR3 = ( PORT_PCR_MUX(0x5));
}
//锁相环频率为50/13*55=211.538462M测试函数
void pllinit211M(void)
{
uint32_t temp_reg;
      //使能IO端口时钟
SIM_SCGC5 |= (SIM_SCGC5_PORTA_MASK
                           | SIM_SCGC5_PORTB_MASK
                           | SIM_SCGC5_PORTC_MASK
                           | SIM_SCGC5_PORTD_MASK
                           | SIM_SCGC5_PORTE_MASK );
//这里处在默认的FEI模式
//首先移动到FBE模式
MCG_C2 = 0;
//MCG_C2 = MCG_C2_RANGE(2) | MCG_C2_HGO_MASK | MCG_C2_EREFS_MASK;
//初始化晶振后释放锁定状态的振荡器和GPIO
SIM_SCGC4 |= SIM_SCGC4_LLWU_MASK;
LLWU_CS |= LLWU_CS_ACKISO_MASK;

//选择外部晶振，参考分频器，清IREFS来启动外部晶振
//011 If RANGE = 0, Divide Factor is 8; for all other RANGE values, Divide Factor is 256.
MCG_C1 = MCG_C1_CLKS(2) | MCG_C1_FRDIV(3);

//等待晶振稳定
//while (!(MCG_S & MCG_S_OSCINIT_MASK)){}             //等待锁相环初始化结束
while (MCG_S & MCG_S_IREFST_MASK){}                //等待时钟切换到外部参考时钟
while (((MCG_S & MCG_S_CLKST_MASK) >> MCG_S_CLKST_SHIFT) != 0x2){}

//进入FBE模式,
//0x18==25分频=2M,
//0x08==15分频=3.333M
//0x09==16分频=3.125M,
//0x10==17分频=2.94M
//0x11==18分频=2.7778M
//0x12==19分频=2.63M,
//0x13==20分频=2.5M
MCG_C5 = MCG_C5_PRDIV(0x0C);

//确保MCG_C6处于复位状态，禁止LOLIE、PLL、和时钟控制器，清PLL VCO分频器
MCG_C6 = 0x0;

//保存FMC_PFAPR当前的值
temp_reg = FMC_PFAPR;

//通过M&PFD置位M0PFD来禁止预取功能
FMC_PFAPR |= FMC_PFAPR_M7PFD_MASK | FMC_PFAPR_M6PFD_MASK | FMC_PFAPR_M5PFD_MASK
                  | FMC_PFAPR_M4PFD_MASK | FMC_PFAPR_M3PFD_MASK | FMC_PFAPR_M2PFD_MASK
                  | FMC_PFAPR_M1PFD_MASK | FMC_PFAPR_M0PFD_MASK;
///设置系统分频器
//MCG=PLL, core = MCG, bus = MCG/3, FlexBus = MCG/3, Flash clock= MCG/8
SIM_CLKDIV1 = SIM_CLKDIV1_OUTDIV1(0) | SIM_CLKDIV1_OUTDIV2(2)
               | SIM_CLKDIV1_OUTDIV3(2) | SIM_CLKDIV1_OUTDIV4(7);

//从新存FMC_PFAPR的原始值
FMC_PFAPR = temp_reg;

//设置VCO分频器，使能PLL为100MHz, LOLIE=0, PLLS=1, CME=0, VDIV=26
MCG_C6 = MCG_C6_PLLS_MASK | MCG_C6_VDIV(30);  //VDIV = 31 (x54)
                                                //VDIV = 26 (x50)
while (!(MCG_S & MCG_S_PLLST_MASK)){}; // wait for PLL status bit to set
while (!(MCG_S & MCG_S_LOCK_MASK)){}; // Wait for LOCK bit to set

//进入PBE模式
//通过清零CLKS位来进入PEE模式
// CLKS=0, FRDIV=3, IREFS=0, IRCLKEN=0, IREFSTEN=0
MCG_C1 &= ~MCG_C1_CLKS_MASK;

//等待时钟状态位更新
while (((MCG_S & MCG_S_CLKST_MASK) >> MCG_S_CLKST_SHIFT) != 0x3){};
//SIM_CLKDIV2 |= SIM_CLKDIV2_USBDIV(1);

//设置跟踪时钟为内核时钟
SIM_SOPT2 |= SIM_SOPT2_TRACECLKSEL_MASK;
//在PTA6引脚上使能TRACE_CLKOU功能
PORTA_PCR6 = ( PORT_PCR_MUX(0x7));
//使能FlexBus模块时钟
SIM_SCGC7 |= SIM_SCGC7_FLEXBUS_MASK;
//在PTA6引脚上使能FB_CLKOUT功能
PORTC_PCR3 = ( PORT_PCR_MUX(0x5));
}
//锁相环频率为50/13*54=207.7M测试函数
void pllinit207M(void)
{
uint32_t temp_reg;
      //使能IO端口时钟
SIM_SCGC5 |= (SIM_SCGC5_PORTA_MASK
                           | SIM_SCGC5_PORTB_MASK
                           | SIM_SCGC5_PORTC_MASK
                           | SIM_SCGC5_PORTD_MASK
                           | SIM_SCGC5_PORTE_MASK );
//这里处在默认的FEI模式
//首先移动到FBE模式
MCG_C2 = 0;
//MCG_C2 = MCG_C2_RANGE(2) | MCG_C2_HGO_MASK | MCG_C2_EREFS_MASK;
//初始化晶振后释放锁定状态的振荡器和GPIO
SIM_SCGC4 |= SIM_SCGC4_LLWU_MASK;
LLWU_CS |= LLWU_CS_ACKISO_MASK;

//选择外部晶振，参考分频器，清IREFS来启动外部晶振
//011 If RANGE = 0, Divide Factor is 8; for all other RANGE values, Divide Factor is 256.
MCG_C1 = MCG_C1_CLKS(2) | MCG_C1_FRDIV(3);

//等待晶振稳定
//while (!(MCG_S & MCG_S_OSCINIT_MASK)){}             //等待锁相环初始化结束
while (MCG_S & MCG_S_IREFST_MASK){}                //等待时钟切换到外部参考时钟
while (((MCG_S & MCG_S_CLKST_MASK) >> MCG_S_CLKST_SHIFT) != 0x2){}

//进入FBE模式,
//0x18==25分频=2M,
//0x08==15分频=3.333M
//0x09==16分频=3.125M,
//0x10==17分频=2.94M
//0x11==18分频=2.7778M
//0x12==19分频=2.63M,
//0x13==20分频=2.5M
MCG_C5 = MCG_C5_PRDIV(0x0C);

//确保MCG_C6处于复位状态，禁止LOLIE、PLL、和时钟控制器，清PLL VCO分频器
MCG_C6 = 0x0;

//保存FMC_PFAPR当前的值
temp_reg = FMC_PFAPR;

//通过M&PFD置位M0PFD来禁止预取功能
FMC_PFAPR |= FMC_PFAPR_M7PFD_MASK | FMC_PFAPR_M6PFD_MASK | FMC_PFAPR_M5PFD_MASK
                  | FMC_PFAPR_M4PFD_MASK | FMC_PFAPR_M3PFD_MASK | FMC_PFAPR_M2PFD_MASK
                  | FMC_PFAPR_M1PFD_MASK | FMC_PFAPR_M0PFD_MASK;
///设置系统分频器
//MCG=PLL, core = MCG, bus = MCG/3, FlexBus = MCG/3, Flash clock= MCG/8
SIM_CLKDIV1 = SIM_CLKDIV1_OUTDIV1(0) | SIM_CLKDIV1_OUTDIV2(2)
               | SIM_CLKDIV1_OUTDIV3(2) | SIM_CLKDIV1_OUTDIV4(7);

//从新存FMC_PFAPR的原始值
FMC_PFAPR = temp_reg;

//设置VCO分频器，使能PLL为100MHz, LOLIE=0, PLLS=1, CME=0, VDIV=26
MCG_C6 = MCG_C6_PLLS_MASK | MCG_C6_VDIV(30);  //VDIV = 31 (x54)
                                                //VDIV = 26 (x50)
while (!(MCG_S & MCG_S_PLLST_MASK)){}; // wait for PLL status bit to set
while (!(MCG_S & MCG_S_LOCK_MASK)){}; // Wait for LOCK bit to set

//进入PBE模式
//通过清零CLKS位来进入PEE模式
// CLKS=0, FRDIV=3, IREFS=0, IRCLKEN=0, IREFSTEN=0
MCG_C1 &= ~MCG_C1_CLKS_MASK;

//等待时钟状态位更新
while (((MCG_S & MCG_S_CLKST_MASK) >> MCG_S_CLKST_SHIFT) != 0x3){};
//SIM_CLKDIV2 |= SIM_CLKDIV2_USBDIV(1);

//设置跟踪时钟为内核时钟
SIM_SOPT2 |= SIM_SOPT2_TRACECLKSEL_MASK;
//在PTA6引脚上使能TRACE_CLKOU功能
PORTA_PCR6 = ( PORT_PCR_MUX(0x7));
//使能FlexBus模块时钟
SIM_SCGC7 |= SIM_SCGC7_FLEXBUS_MASK;
//在PTA6引脚上使能FB_CLKOUT功能
PORTC_PCR3 = ( PORT_PCR_MUX(0x5));
}
//锁相环频率为50/15*54=180M测试函数
void pllinit180M(void)
{
uint32_t temp_reg;
      //使能IO端口时钟

martain · 发表于 2012-4-17 22:40:56

SIM_SCGC5 |= (SIM_SCGC5_PORTA_MASK
                           | SIM_SCGC5_PORTB_MASK
                           | SIM_SCGC5_PORTC_MASK
                           | SIM_SCGC5_PORTD_MASK
                           | SIM_SCGC5_PORTE_MASK );
//这里处在默认的FEI模式
//首先移动到FBE模式
MCG_C2 = 0;
//MCG_C2 = MCG_C2_RANGE(2) | MCG_C2_HGO_MASK | MCG_C2_EREFS_MASK;
//初始化晶振后释放锁定状态的振荡器和GPIO
SIM_SCGC4 |= SIM_SCGC4_LLWU_MASK;
LLWU_CS |= LLWU_CS_ACKISO_MASK;

//选择外部晶振，参考分频器，清IREFS来启动外部晶振
//011 If RANGE = 0, Divide Factor is 8; for all other RANGE values, Divide Factor is 256.
MCG_C1 = MCG_C1_CLKS(2) | MCG_C1_FRDIV(3);

//等待晶振稳定
//while (!(MCG_S & MCG_S_OSCINIT_MASK)){}             //等待锁相环初始化结束
while (MCG_S & MCG_S_IREFST_MASK){}                //等待时钟切换到外部参考时钟
while (((MCG_S & MCG_S_CLKST_MASK) >> MCG_S_CLKST_SHIFT) != 0x2){}

//进入FBE模式,
//0x18==25分频=2M,
//0x08==15分频=3.333M
//0x09==16分频=3.125M,
//0x10==17分频=2.94M
//0x11==18分频=2.7778M
//0x12==19分频=2.63M,
//0x13==20分频=2.5M
MCG_C5 = MCG_C5_PRDIV(0x0e);

//确保MCG_C6处于复位状态，禁止LOLIE、PLL、和时钟控制器，清PLL VCO分频器
MCG_C6 = 0x0;

//保存FMC_PFAPR当前的值
temp_reg = FMC_PFAPR;

//通过M&PFD置位M0PFD来禁止预取功能
FMC_PFAPR |= FMC_PFAPR_M7PFD_MASK | FMC_PFAPR_M6PFD_MASK | FMC_PFAPR_M5PFD_MASK
                  | FMC_PFAPR_M4PFD_MASK | FMC_PFAPR_M3PFD_MASK | FMC_PFAPR_M2PFD_MASK
                  | FMC_PFAPR_M1PFD_MASK | FMC_PFAPR_M0PFD_MASK;
///设置系统分频器
//MCG=PLL, core = MCG, bus = MCG/3, FlexBus = MCG/3, Flash clock= MCG/8
SIM_CLKDIV1 = SIM_CLKDIV1_OUTDIV1(0) | SIM_CLKDIV1_OUTDIV2(2)
               | SIM_CLKDIV1_OUTDIV3(2) | SIM_CLKDIV1_OUTDIV4(7);

//从新存FMC_PFAPR的原始值
FMC_PFAPR = temp_reg;

//设置VCO分频器，使能PLL为100MHz, LOLIE=0, PLLS=1, CME=0, VDIV=26
MCG_C6 = MCG_C6_PLLS_MASK | MCG_C6_VDIV(30);  //VDIV = 31 (x54)
                                                //VDIV = 26 (x50)
while (!(MCG_S & MCG_S_PLLST_MASK)){}; // wait for PLL status bit to set
while (!(MCG_S & MCG_S_LOCK_MASK)){}; // Wait for LOCK bit to set

//进入PBE模式
//通过清零CLKS位来进入PEE模式
// CLKS=0, FRDIV=3, IREFS=0, IRCLKEN=0, IREFSTEN=0
MCG_C1 &= ~MCG_C1_CLKS_MASK;

//等待时钟状态位更新
while (((MCG_S & MCG_S_CLKST_MASK) >> MCG_S_CLKST_SHIFT) != 0x3){};
//SIM_CLKDIV2 |= SIM_CLKDIV2_USBDIV(1);

//设置跟踪时钟为内核时钟
SIM_SOPT2 |= SIM_SOPT2_TRACECLKSEL_MASK;
//在PTA6引脚上使能TRACE_CLKOU功能
PORTA_PCR6 = ( PORT_PCR_MUX(0x7));
//使能FlexBus模块时钟
SIM_SCGC7 |= SIM_SCGC7_FLEXBUS_MASK;
//在PTA6引脚上使能FB_CLKOUT功能
PORTC_PCR3 = ( PORT_PCR_MUX(0x5));
}

//锁相环频率为50/16*54=168.75M测试函数
void pllinit168d75M(void)
{
uint32_t temp_reg;
      //使能IO端口时钟
SIM_SCGC5 |= (SIM_SCGC5_PORTA_MASK
                           | SIM_SCGC5_PORTB_MASK
                           | SIM_SCGC5_PORTC_MASK
                           | SIM_SCGC5_PORTD_MASK
                           | SIM_SCGC5_PORTE_MASK );
//这里处在默认的FEI模式
//首先移动到FBE模式
MCG_C2 = 0;
//MCG_C2 = MCG_C2_RANGE(2) | MCG_C2_HGO_MASK | MCG_C2_EREFS_MASK;
//初始化晶振后释放锁定状态的振荡器和GPIO
SIM_SCGC4 |= SIM_SCGC4_LLWU_MASK;
LLWU_CS |= LLWU_CS_ACKISO_MASK;

//选择外部晶振，参考分频器，清IREFS来启动外部晶振
//011 If RANGE = 0, Divide Factor is 8; for all other RANGE values, Divide Factor is 256.
MCG_C1 = MCG_C1_CLKS(2) | MCG_C1_FRDIV(3);

//等待晶振稳定
//while (!(MCG_S & MCG_S_OSCINIT_MASK)){}             //等待锁相环初始化结束
while (MCG_S & MCG_S_IREFST_MASK){}                //等待时钟切换到外部参考时钟
while (((MCG_S & MCG_S_CLKST_MASK) >> MCG_S_CLKST_SHIFT) != 0x2){}

//进入FBE模式,
//0x18==25分频=2M,
//0x08==15分频=3.333M
//0x09==16分频=3.125M,
//0x10==17分频=2.94M
//0x11==18分频=2.7778M
//0x12==19分频=2.63M,
//0x13==20分频=2.5M
MCG_C5 = MCG_C5_PRDIV(0x0f);

//确保MCG_C6处于复位状态，禁止LOLIE、PLL、和时钟控制器，清PLL VCO分频器
MCG_C6 = 0x0;

//保存FMC_PFAPR当前的值
temp_reg = FMC_PFAPR;

//通过M&PFD置位M0PFD来禁止预取功能
FMC_PFAPR |= FMC_PFAPR_M7PFD_MASK | FMC_PFAPR_M6PFD_MASK | FMC_PFAPR_M5PFD_MASK
                  | FMC_PFAPR_M4PFD_MASK | FMC_PFAPR_M3PFD_MASK | FMC_PFAPR_M2PFD_MASK
                  | FMC_PFAPR_M1PFD_MASK | FMC_PFAPR_M0PFD_MASK;
///设置系统分频器
//MCG=PLL, core = MCG, bus = MCG/3, FlexBus = MCG/3, Flash clock= MCG/8
SIM_CLKDIV1 = SIM_CLKDIV1_OUTDIV1(0) | SIM_CLKDIV1_OUTDIV2(2)
               | SIM_CLKDIV1_OUTDIV3(2) | SIM_CLKDIV1_OUTDIV4(7);

//从新存FMC_PFAPR的原始值
FMC_PFAPR = temp_reg;

//设置VCO分频器，使能PLL为100MHz, LOLIE=0, PLLS=1, CME=0, VDIV=26
MCG_C6 = MCG_C6_PLLS_MASK | MCG_C6_VDIV(30);  //VDIV = 31 (x54)
                                                //VDIV = 26 (x50)
while (!(MCG_S & MCG_S_PLLST_MASK)){}; // wait for PLL status bit to set
while (!(MCG_S & MCG_S_LOCK_MASK)){}; // Wait for LOCK bit to set

//进入PBE模式
//通过清零CLKS位来进入PEE模式
// CLKS=0, FRDIV=3, IREFS=0, IRCLKEN=0, IREFSTEN=0
MCG_C1 &= ~MCG_C1_CLKS_MASK;

//等待时钟状态位更新
while (((MCG_S & MCG_S_CLKST_MASK) >> MCG_S_CLKST_SHIFT) != 0x3){};
//SIM_CLKDIV2 |= SIM_CLKDIV2_USBDIV(1);

//设置跟踪时钟为内核时钟
SIM_SOPT2 |= SIM_SOPT2_TRACECLKSEL_MASK;
//在PTA6引脚上使能TRACE_CLKOU功能
PORTA_PCR6 = ( PORT_PCR_MUX(0x7));
//使能FlexBus模块时钟
SIM_SCGC7 |= SIM_SCGC7_FLEXBUS_MASK;
//在PTA6引脚上使能FB_CLKOUT功能
PORTC_PCR3 = ( PORT_PCR_MUX(0x5));
}
//锁相环频率为50/18*54=150M测试函数
void pllinit150M(void)
{
uint32_t temp_reg;
      //使能IO端口时钟
SIM_SCGC5 |= (SIM_SCGC5_PORTA_MASK
                           | SIM_SCGC5_PORTB_MASK
                           | SIM_SCGC5_PORTC_MASK
                           | SIM_SCGC5_PORTD_MASK
                           | SIM_SCGC5_PORTE_MASK );
//这里处在默认的FEI模式
//首先移动到FBE模式
MCG_C2 = 0;
//MCG_C2 = MCG_C2_RANGE(2) | MCG_C2_HGO_MASK | MCG_C2_EREFS_MASK;
//初始化晶振后释放锁定状态的振荡器和GPIO
SIM_SCGC4 |= SIM_SCGC4_LLWU_MASK;
LLWU_CS |= LLWU_CS_ACKISO_MASK;

//选择外部晶振，参考分频器，清IREFS来启动外部晶振
//011 If RANGE = 0, Divide Factor is 8; for all other RANGE values, Divide Factor is 256.
MCG_C1 = MCG_C1_CLKS(2) | MCG_C1_FRDIV(3);

//等待晶振稳定
//while (!(MCG_S & MCG_S_OSCINIT_MASK)){}             //等待锁相环初始化结束
while (MCG_S & MCG_S_IREFST_MASK){}                //等待时钟切换到外部参考时钟
while (((MCG_S & MCG_S_CLKST_MASK) >> MCG_S_CLKST_SHIFT) != 0x2){}

//进入FBE模式,
//0x18==25分频=2M,
//0x11==18分频=2.7778M
//0x12==19分频=2.63M,
//0x13==20分频=2.5M
MCG_C5 = MCG_C5_PRDIV(0x11);

//确保MCG_C6处于复位状态，禁止LOLIE、PLL、和时钟控制器，清PLL VCO分频器
MCG_C6 = 0x0;

//保存FMC_PFAPR当前的值
temp_reg = FMC_PFAPR;

//通过M&PFD置位M0PFD来禁止预取功能
FMC_PFAPR |= FMC_PFAPR_M7PFD_MASK | FMC_PFAPR_M6PFD_MASK | FMC_PFAPR_M5PFD_MASK
                  | FMC_PFAPR_M4PFD_MASK | FMC_PFAPR_M3PFD_MASK | FMC_PFAPR_M2PFD_MASK
                  | FMC_PFAPR_M1PFD_MASK | FMC_PFAPR_M0PFD_MASK;
///设置系统分频器
//MCG=PLL, core = MCG, bus = MCG/2, FlexBus = MCG/2, Flash clock= MCG/8
SIM_CLKDIV1 = SIM_CLKDIV1_OUTDIV1(0) | SIM_CLKDIV1_OUTDIV2(1)
               | SIM_CLKDIV1_OUTDIV3(1) | SIM_CLKDIV1_OUTDIV4(7);

//从新存FMC_PFAPR的原始值
FMC_PFAPR = temp_reg;

//设置VCO分频器，使能PLL为100MHz, LOLIE=0, PLLS=1, CME=0, VDIV=26
MCG_C6 = MCG_C6_PLLS_MASK | MCG_C6_VDIV(30);  //VDIV = 31 (x54)
                                                //VDIV = 26 (x50)
while (!(MCG_S & MCG_S_PLLST_MASK)){}; // wait for PLL status bit to set
while (!(MCG_S & MCG_S_LOCK_MASK)){}; // Wait for LOCK bit to set

//进入PBE模式
//通过清零CLKS位来进入PEE模式
// CLKS=0, FRDIV=3, IREFS=0, IRCLKEN=0, IREFSTEN=0
MCG_C1 &= ~MCG_C1_CLKS_MASK;

//等待时钟状态位更新
while (((MCG_S & MCG_S_CLKST_MASK) >> MCG_S_CLKST_SHIFT) != 0x3){};
//SIM_CLKDIV2 |= SIM_CLKDIV2_USBDIV(1);

//设置跟踪时钟为内核时钟
SIM_SOPT2 |= SIM_SOPT2_TRACECLKSEL_MASK;
//在PTA6引脚上使能TRACE_CLKOU功能
PORTA_PCR6 = ( PORT_PCR_MUX(0x7));
//使能FlexBus模块时钟
SIM_SCGC7 |= SIM_SCGC7_FLEXBUS_MASK;
//在PTA6引脚上使能FB_CLKOUT功能
PORTC_PCR3 = ( PORT_PCR_MUX(0x5));
}
//锁相环频率为50/19*55=144.7386421M测试函数
void pllinit144M(void)
{
uint32_t temp_reg;
      //使能IO端口时钟
SIM_SCGC5 |= (SIM_SCGC5_PORTA_MASK
                           | SIM_SCGC5_PORTB_MASK
                           | SIM_SCGC5_PORTC_MASK
                           | SIM_SCGC5_PORTD_MASK
                           | SIM_SCGC5_PORTE_MASK );
//这里处在默认的FEI模式
//首先移动到FBE模式
MCG_C2 = 0;
//MCG_C2 = MCG_C2_RANGE(2) | MCG_C2_HGO_MASK | MCG_C2_EREFS_MASK;
//初始化晶振后释放锁定状态的振荡器和GPIO
SIM_SCGC4 |= SIM_SCGC4_LLWU_MASK;
LLWU_CS |= LLWU_CS_ACKISO_MASK;

//选择外部晶振，参考分频器，清IREFS来启动外部晶振
//011 If RANGE = 0, Divide Factor is 8; for all other RANGE values, Divide Factor is 256.
MCG_C1 = MCG_C1_CLKS(2) | MCG_C1_FRDIV(3);

//等待晶振稳定
//while (!(MCG_S & MCG_S_OSCINIT_MASK)){}             //等待锁相环初始化结束
while (MCG_S & MCG_S_IREFST_MASK){}                //等待时钟切换到外部参考时钟
while (((MCG_S & MCG_S_CLKST_MASK) >> MCG_S_CLKST_SHIFT) != 0x2){}

//进入FBE模式,
//0x18==25分频=2M,
//0x11==18分频=2.7778M
//0x12==19分频=2.63M,
//0x13==20分频=2.5M
MCG_C5 = MCG_C5_PRDIV(0x12);

//确保MCG_C6处于复位状态，禁止LOLIE、PLL、和时钟控制器，清PLL VCO分频器
MCG_C6 = 0x0;

//保存FMC_PFAPR当前的值
temp_reg = FMC_PFAPR;

//通过M&PFD置位M0PFD来禁止预取功能
FMC_PFAPR |= FMC_PFAPR_M7PFD_MASK | FMC_PFAPR_M6PFD_MASK | FMC_PFAPR_M5PFD_MASK
                  | FMC_PFAPR_M4PFD_MASK | FMC_PFAPR_M3PFD_MASK | FMC_PFAPR_M2PFD_MASK
                  | FMC_PFAPR_M1PFD_MASK | FMC_PFAPR_M0PFD_MASK;
///设置系统分频器
//MCG=PLL, core = MCG, bus = MCG/2, FlexBus = MCG/2, Flash clock= MCG/6
SIM_CLKDIV1 = SIM_CLKDIV1_OUTDIV1(0) | SIM_CLKDIV1_OUTDIV2(1)
               | SIM_CLKDIV1_OUTDIV3(1) | SIM_CLKDIV1_OUTDIV4(5);

//从新存FMC_PFAPR的原始值
FMC_PFAPR = temp_reg;

//设置VCO分频器，使能PLL为100MHz, LOLIE=0, PLLS=1, CME=0, VDIV=26
MCG_C6 = MCG_C6_PLLS_MASK | MCG_C6_VDIV(31);  //VDIV = 31 (x55)
                                                //VDIV = 26 (x50)
while (!(MCG_S & MCG_S_PLLST_MASK)){}; // wait for PLL status bit to set
while (!(MCG_S & MCG_S_LOCK_MASK)){}; // Wait for LOCK bit to set

//进入PBE模式
//通过清零CLKS位来进入PEE模式
// CLKS=0, FRDIV=3, IREFS=0, IRCLKEN=0, IREFSTEN=0
MCG_C1 &= ~MCG_C1_CLKS_MASK;

//等待时钟状态位更新
while (((MCG_S & MCG_S_CLKST_MASK) >> MCG_S_CLKST_SHIFT) != 0x3){};
//SIM_CLKDIV2 |= SIM_CLKDIV2_USBDIV(1);

//设置跟踪时钟为内核时钟
SIM_SOPT2 |= SIM_SOPT2_TRACECLKSEL_MASK;
//在PTA6引脚上使能TRACE_CLKOU功能
PORTA_PCR6 = ( PORT_PCR_MUX(0x7));
//使能FlexBus模块时钟
SIM_SCGC7 |= SIM_SCGC7_FLEXBUS_MASK;
//在PTA6引脚上使能FB_CLKOUT功能
PORTC_PCR3 = ( PORT_PCR_MUX(0x5));
}
//锁相环频率为137.5M测试函数
void pllinit1375M(void)
{
uint32_t temp_reg;
      //使能IO端口时钟
SIM_SCGC5 |= (SIM_SCGC5_PORTA_MASK
                           | SIM_SCGC5_PORTB_MASK
                           | SIM_SCGC5_PORTC_MASK
                           | SIM_SCGC5_PORTD_MASK
                           | SIM_SCGC5_PORTE_MASK );
//这里处在默认的FEI模式
//首先移动到FBE模式
MCG_C2 = 0;
//MCG_C2 = MCG_C2_RANGE(2) | MCG_C2_HGO_MASK | MCG_C2_EREFS_MASK;
//初始化晶振后释放锁定状态的振荡器和GPIO
SIM_SCGC4 |= SIM_SCGC4_LLWU_MASK;
LLWU_CS |= LLWU_CS_ACKISO_MASK;

//选择外部晶振，参考分频器，清IREFS来启动外部晶振
//011 If RANGE = 0, Divide Factor is 8; for all other RANGE values, Divide Factor is 256.
MCG_C1 = MCG_C1_CLKS(2) | MCG_C1_FRDIV(3);

//等待晶振稳定
//while (!(MCG_S & MCG_S_OSCINIT_MASK)){}             //等待锁相环初始化结束
while (MCG_S & MCG_S_IREFST_MASK){}                //等待时钟切换到外部参考时钟
while (((MCG_S & MCG_S_CLKST_MASK) >> MCG_S_CLKST_SHIFT) != 0x2){}

//进入FBE模式,
//0x18==25分频=2M,
//0x11==18分频=2.7778M
//0x12==19分频=2.63M,
//0x13==20分频=2.5M
MCG_C5 = MCG_C5_PRDIV(0x13);

//确保MCG_C6处于复位状态，禁止LOLIE、PLL、和时钟控制器，清PLL VCO分频器
MCG_C6 = 0x0;

//保存FMC_PFAPR当前的值
temp_reg = FMC_PFAPR;

//通过M&PFD置位M0PFD来禁止预取功能
FMC_PFAPR |= FMC_PFAPR_M7PFD_MASK | FMC_PFAPR_M6PFD_MASK | FMC_PFAPR_M5PFD_MASK
                  | FMC_PFAPR_M4PFD_MASK | FMC_PFAPR_M3PFD_MASK | FMC_PFAPR_M2PFD_MASK
                  | FMC_PFAPR_M1PFD_MASK | FMC_PFAPR_M0PFD_MASK;
///设置系统分频器
//MCG=PLL, core = MCG, bus = MCG/2, FlexBus = MCG/2, Flash clock= MCG/6
SIM_CLKDIV1 = SIM_CLKDIV1_OUTDIV1(0) | SIM_CLKDIV1_OUTDIV2(1)
               | SIM_CLKDIV1_OUTDIV3(1) | SIM_CLKDIV1_OUTDIV4(5);

//从新存FMC_PFAPR的原始值
FMC_PFAPR = temp_reg;

//设置VCO分频器，使能PLL为100MHz, LOLIE=0, PLLS=1, CME=0, VDIV=26
MCG_C6 = MCG_C6_PLLS_MASK | MCG_C6_VDIV(31);  //VDIV = 31 (x55)
                                                //VDIV = 26 (x50)
while (!(MCG_S & MCG_S_PLLST_MASK)){}; // wait for PLL status bit to set
while (!(MCG_S & MCG_S_LOCK_MASK)){}; // Wait for LOCK bit to set

//进入PBE模式
//通过清零CLKS位来进入PEE模式
// CLKS=0, FRDIV=3, IREFS=0, IRCLKEN=0, IREFSTEN=0
MCG_C1 &= ~MCG_C1_CLKS_MASK;

//等待时钟状态位更新
while (((MCG_S & MCG_S_CLKST_MASK) >> MCG_S_CLKST_SHIFT) != 0x3){};
//SIM_CLKDIV2 |= SIM_CLKDIV2_USBDIV(1);

//设置跟踪时钟为内核时钟
SIM_SOPT2 |= SIM_SOPT2_TRACECLKSEL_MASK;
//在PTA6引脚上使能TRACE_CLKOU功能
PORTA_PCR6 = ( PORT_PCR_MUX(0x7));
//使能FlexBus模块时钟
SIM_SCGC7 |= SIM_SCGC7_FLEXBUS_MASK;
//在PTA6引脚上使能FB_CLKOUT功能
PORTC_PCR3 = ( PORT_PCR_MUX(0x5));
}
//锁相环频率为125M测试函数

martain · 发表于 2012-4-17 22:41:34

void pllinit125M(void)
{
uint32_t temp_reg;
      //使能IO端口时钟
SIM_SCGC5 |= (SIM_SCGC5_PORTA_MASK
                           | SIM_SCGC5_PORTB_MASK
                           | SIM_SCGC5_PORTC_MASK
                           | SIM_SCGC5_PORTD_MASK
                           | SIM_SCGC5_PORTE_MASK );
//这里处在默认的FEI模式
//首先移动到FBE模式
MCG_C2 = 0;
//MCG_C2 = MCG_C2_RANGE(2) | MCG_C2_HGO_MASK | MCG_C2_EREFS_MASK;
//初始化晶振后释放锁定状态的振荡器和GPIO
SIM_SCGC4 |= SIM_SCGC4_LLWU_MASK;
LLWU_CS |= LLWU_CS_ACKISO_MASK;

//选择外部晶振，参考分频器，清IREFS来启动外部晶振
//011 If RANGE = 0, Divide Factor is 8; for all other RANGE values, Divide Factor is 256.
MCG_C1 = MCG_C1_CLKS(2) | MCG_C1_FRDIV(3);

//等待晶振稳定
//while (!(MCG_S & MCG_S_OSCINIT_MASK)){}             //等待锁相环初始化结束
while (MCG_S & MCG_S_IREFST_MASK){}                //等待时钟切换到外部参考时钟
while (((MCG_S & MCG_S_CLKST_MASK) >> MCG_S_CLKST_SHIFT) != 0x2){}

//进入FBE模式,
//0x18==25分频=2M,
//0x11==18分频=2.7778M
//0x12==19分频=2.63M,
//0x13==20分频=2.5M
MCG_C5 = MCG_C5_PRDIV(0x13);

//确保MCG_C6处于复位状态，禁止LOLIE、PLL、和时钟控制器，清PLL VCO分频器
MCG_C6 = 0x0;

//保存FMC_PFAPR当前的值
temp_reg = FMC_PFAPR;

//通过M&PFD置位M0PFD来禁止预取功能
FMC_PFAPR |= FMC_PFAPR_M7PFD_MASK | FMC_PFAPR_M6PFD_MASK | FMC_PFAPR_M5PFD_MASK
                  | FMC_PFAPR_M4PFD_MASK | FMC_PFAPR_M3PFD_MASK | FMC_PFAPR_M2PFD_MASK
                  | FMC_PFAPR_M1PFD_MASK | FMC_PFAPR_M0PFD_MASK;
///设置系统分频器
//MCG=PLL, core = MCG, bus = MCG/2, FlexBus = MCG/2, Flash clock= MCG/6
SIM_CLKDIV1 = SIM_CLKDIV1_OUTDIV1(0) | SIM_CLKDIV1_OUTDIV2(1)
               | SIM_CLKDIV1_OUTDIV3(1) | SIM_CLKDIV1_OUTDIV4(5);

//从新存FMC_PFAPR的原始值
FMC_PFAPR = temp_reg;

//设置VCO分频器，使能PLL为100MHz, LOLIE=0, PLLS=1, CME=0, VDIV=26
MCG_C6 = MCG_C6_PLLS_MASK | MCG_C6_VDIV(26);  //VDIV = 31 (x55)
                                                //VDIV = 26 (x50)
while (!(MCG_S & MCG_S_PLLST_MASK)){}; // wait for PLL status bit to set
while (!(MCG_S & MCG_S_LOCK_MASK)){}; // Wait for LOCK bit to set

//进入PBE模式
//通过清零CLKS位来进入PEE模式
// CLKS=0, FRDIV=3, IREFS=0, IRCLKEN=0, IREFSTEN=0
MCG_C1 &= ~MCG_C1_CLKS_MASK;

//等待时钟状态位更新
while (((MCG_S & MCG_S_CLKST_MASK) >> MCG_S_CLKST_SHIFT) != 0x3){};
//SIM_CLKDIV2 |= SIM_CLKDIV2_USBDIV(1);

      //设置跟踪时钟为内核时钟
SIM_SOPT2 |= SIM_SOPT2_TRACECLKSEL_MASK;
//在PTA6引脚上使能TRACE_CLKOU功能
PORTA_PCR6 = ( PORT_PCR_MUX(0x7));
//使能FlexBus模块时钟
SIM_SCGC7 |= SIM_SCGC7_FLEXBUS_MASK;
//在PTA6引脚上使能FB_CLKOUT功能
PORTC_PCR3 = ( PORT_PCR_MUX(0x5));
}

//锁相环频率为100M测试函数
void pllinit100M(void)
{
uint32_t temp_reg;
      //使能IO端口时钟
SIM_SCGC5 |= (SIM_SCGC5_PORTA_MASK
                           | SIM_SCGC5_PORTB_MASK
                           | SIM_SCGC5_PORTC_MASK
                           | SIM_SCGC5_PORTD_MASK
                           | SIM_SCGC5_PORTE_MASK );
//这里处在默认的FEI模式
//首先移动到FBE模式
MCG_C2 = 0;
//MCG_C2 = MCG_C2_RANGE(2) | MCG_C2_HGO_MASK | MCG_C2_EREFS_MASK;
//初始化晶振后释放锁定状态的振荡器和GPIO
SIM_SCGC4 |= SIM_SCGC4_LLWU_MASK;
LLWU_CS |= LLWU_CS_ACKISO_MASK;

//选择外部晶振，参考分频器，清IREFS来启动外部晶振
//011 If RANGE = 0, Divide Factor is 8; for all other RANGE values, Divide Factor is 256.
MCG_C1 = MCG_C1_CLKS(2) | MCG_C1_FRDIV(3);

//等待晶振稳定
//while (!(MCG_S & MCG_S_OSCINIT_MASK)){}             //等待锁相环初始化结束
while (MCG_S & MCG_S_IREFST_MASK){}                //等待时钟切换到外部参考时钟
while (((MCG_S & MCG_S_CLKST_MASK) >> MCG_S_CLKST_SHIFT) != 0x2){}

//进入FBE模式,
//0x18==25分频=2M,
//0x11==18分频=2.7778M
//0x12==19分频=2.63M,
//0x13==20分频=2.5M
MCG_C5 = MCG_C5_PRDIV(0x18);

//确保MCG_C6处于复位状态，禁止LOLIE、PLL、和时钟控制器，清PLL VCO分频器
MCG_C6 = 0x0;

//保存FMC_PFAPR当前的值
temp_reg = FMC_PFAPR;

//通过M&PFD置位M0PFD来禁止预取功能
FMC_PFAPR |= FMC_PFAPR_M7PFD_MASK | FMC_PFAPR_M6PFD_MASK | FMC_PFAPR_M5PFD_MASK
                  | FMC_PFAPR_M4PFD_MASK | FMC_PFAPR_M3PFD_MASK | FMC_PFAPR_M2PFD_MASK
                  | FMC_PFAPR_M1PFD_MASK | FMC_PFAPR_M0PFD_MASK;
///设置系统分频器
//MCG=PLL, core = MCG, bus = MCG/2, FlexBus = MCG/2, Flash clock= MCG/4
SIM_CLKDIV1 = SIM_CLKDIV1_OUTDIV1(0) | SIM_CLKDIV1_OUTDIV2(1)
               | SIM_CLKDIV1_OUTDIV3(1) | SIM_CLKDIV1_OUTDIV4(3);

//从新存FMC_PFAPR的原始值
FMC_PFAPR = temp_reg;

//设置VCO分频器，使能PLL为100MHz, LOLIE=0, PLLS=1, CME=0, VDIV=26
MCG_C6 = MCG_C6_PLLS_MASK | MCG_C6_VDIV(26);  //VDIV = 31 (x55)
                                                //VDIV = 26 (x50)
while (!(MCG_S & MCG_S_PLLST_MASK)){}; // wait for PLL status bit to set
while (!(MCG_S & MCG_S_LOCK_MASK)){}; // Wait for LOCK bit to set

//进入PBE模式
//通过清零CLKS位来进入PEE模式
// CLKS=0, FRDIV=3, IREFS=0, IRCLKEN=0, IREFSTEN=0
MCG_C1 &= ~MCG_C1_CLKS_MASK;

//等待时钟状态位更新
while (((MCG_S & MCG_S_CLKST_MASK) >> MCG_S_CLKST_SHIFT) != 0x3){};
//SIM_CLKDIV2 |= SIM_CLKDIV2_USBDIV(1);

      //设置跟踪时钟为内核时钟
SIM_SOPT2 |= SIM_SOPT2_TRACECLKSEL_MASK;
//在PTA6引脚上使能TRACE_CLKOU功能
PORTA_PCR6 = ( PORT_PCR_MUX(0x7));
//使能FlexBus模块时钟
SIM_SCGC7 |= SIM_SCGC7_FLEXBUS_MASK;
//在PTA6引脚上使能FB_CLKOUT功能
PORTC_PCR3 = ( PORT_PCR_MUX(0x5));
}

//锁相环频率为80M测试函数
void pllinit80M(void)
{
uint32_t temp_reg;
      //使能IO端口时钟
SIM_SCGC5 |= (SIM_SCGC5_PORTA_MASK
                           | SIM_SCGC5_PORTB_MASK
                           | SIM_SCGC5_PORTC_MASK
                           | SIM_SCGC5_PORTD_MASK
                           | SIM_SCGC5_PORTE_MASK );
//这里处在默认的FEI模式
//首先移动到FBE模式
MCG_C2 = 0;
//MCG_C2 = MCG_C2_RANGE(2) | MCG_C2_HGO_MASK | MCG_C2_EREFS_MASK;
//初始化晶振后释放锁定状态的振荡器和GPIO
SIM_SCGC4 |= SIM_SCGC4_LLWU_MASK;
LLWU_CS |= LLWU_CS_ACKISO_MASK;

//选择外部晶振，参考分频器，清IREFS来启动外部晶振
//011 If RANGE = 0, Divide Factor is 8; for all other RANGE values, Divide Factor is 256.
MCG_C1 = MCG_C1_CLKS(2) | MCG_C1_FRDIV(3);

//等待晶振稳定
//while (!(MCG_S & MCG_S_OSCINIT_MASK)){}             //等待锁相环初始化结束
while (MCG_S & MCG_S_IREFST_MASK){}                //等待时钟切换到外部参考时钟
while (((MCG_S & MCG_S_CLKST_MASK) >> MCG_S_CLKST_SHIFT) != 0x2){}

//进入FBE模式,
//0x18==25分频=2M,
//0x11==18分频=2.7778M
//0x12==19分频=2.63M,
//0x13==20分频=2.5M
MCG_C5 = MCG_C5_PRDIV(0x18);

//确保MCG_C6处于复位状态，禁止LOLIE、PLL、和时钟控制器，清PLL VCO分频器
MCG_C6 = 0x0;

//保存FMC_PFAPR当前的值
temp_reg = FMC_PFAPR;

//通过M&PFD置位M0PFD来禁止预取功能
FMC_PFAPR |= FMC_PFAPR_M7PFD_MASK | FMC_PFAPR_M6PFD_MASK | FMC_PFAPR_M5PFD_MASK
                  | FMC_PFAPR_M4PFD_MASK | FMC_PFAPR_M3PFD_MASK | FMC_PFAPR_M2PFD_MASK
                  | FMC_PFAPR_M1PFD_MASK | FMC_PFAPR_M0PFD_MASK;
///设置系统分频器
//MCG=PLL, core = MCG, bus = MCG/2, FlexBus = MCG/2, Flash clock= MCG/4
SIM_CLKDIV1 = SIM_CLKDIV1_OUTDIV1(0) | SIM_CLKDIV1_OUTDIV2(1)
               | SIM_CLKDIV1_OUTDIV3(1) | SIM_CLKDIV1_OUTDIV4(3);

//从新存FMC_PFAPR的原始值
FMC_PFAPR = temp_reg;

//设置VCO分频器，使能PLL为100MHz, LOLIE=0, PLLS=1, CME=0, VDIV=26
MCG_C6 = MCG_C6_PLLS_MASK | MCG_C6_VDIV(16);  //VDIV = 31 (x55)
                                                //VDIV = 26 (x50)
   //VDIV = 16 (x40)
while (!(MCG_S & MCG_S_PLLST_MASK)){}; // wait for PLL status bit to set
while (!(MCG_S & MCG_S_LOCK_MASK)){}; // Wait for LOCK bit to set

//进入PBE模式
//通过清零CLKS位来进入PEE模式
// CLKS=0, FRDIV=3, IREFS=0, IRCLKEN=0, IREFSTEN=0
MCG_C1 &= ~MCG_C1_CLKS_MASK;

//等待时钟状态位更新
while (((MCG_S & MCG_S_CLKST_MASK) >> MCG_S_CLKST_SHIFT) != 0x3){};
//SIM_CLKDIV2 |= SIM_CLKDIV2_USBDIV(1);

      //设置跟踪时钟为内核时钟
SIM_SOPT2 |= SIM_SOPT2_TRACECLKSEL_MASK;
//在PTA6引脚上使能TRACE_CLKOU功能
PORTA_PCR6 = ( PORT_PCR_MUX(0x7));
//使能FlexBus模块时钟
SIM_SCGC7 |= SIM_SCGC7_FLEXBUS_MASK;
//在PTA6引脚上使能FB_CLKOUT功能
PORTC_PCR3 = ( PORT_PCR_MUX(0x5));
}

//锁相环频率为60M测试函数
void pllinit60M(void)
{
uint32_t temp_reg;
      //使能IO端口时钟
SIM_SCGC5 |= (SIM_SCGC5_PORTA_MASK
                           | SIM_SCGC5_PORTB_MASK
                           | SIM_SCGC5_PORTC_MASK
                           | SIM_SCGC5_PORTD_MASK
                           | SIM_SCGC5_PORTE_MASK );
//这里处在默认的FEI模式
//首先移动到FBE模式
MCG_C2 = 0;
//MCG_C2 = MCG_C2_RANGE(2) | MCG_C2_HGO_MASK | MCG_C2_EREFS_MASK;
//初始化晶振后释放锁定状态的振荡器和GPIO
SIM_SCGC4 |= SIM_SCGC4_LLWU_MASK;
LLWU_CS |= LLWU_CS_ACKISO_MASK;

//选择外部晶振，参考分频器，清IREFS来启动外部晶振
//011 If RANGE = 0, Divide Factor is 8; for all other RANGE values, Divide Factor is 256.
MCG_C1 = MCG_C1_CLKS(2) | MCG_C1_FRDIV(3);

//等待晶振稳定
//while (!(MCG_S & MCG_S_OSCINIT_MASK)){}             //等待锁相环初始化结束
while (MCG_S & MCG_S_IREFST_MASK){}                //等待时钟切换到外部参考时钟
while (((MCG_S & MCG_S_CLKST_MASK) >> MCG_S_CLKST_SHIFT) != 0x2){}

//进入FBE模式,
//0x18==25分频=2M,
//0x11==18分频=2.7778M
//0x12==19分频=2.63M,
//0x13==20分频=2.5M
MCG_C5 = MCG_C5_PRDIV(0x18);

//确保MCG_C6处于复位状态，禁止LOLIE、PLL、和时钟控制器，清PLL VCO分频器
MCG_C6 = 0x0;

//保存FMC_PFAPR当前的值
temp_reg = FMC_PFAPR;

//通过M&PFD置位M0PFD来禁止预取功能
FMC_PFAPR |= FMC_PFAPR_M7PFD_MASK | FMC_PFAPR_M6PFD_MASK | FMC_PFAPR_M5PFD_MASK
                  | FMC_PFAPR_M4PFD_MASK | FMC_PFAPR_M3PFD_MASK | FMC_PFAPR_M2PFD_MASK
                  | FMC_PFAPR_M1PFD_MASK | FMC_PFAPR_M0PFD_MASK;
///设置系统分频器
//MCG=PLL, core = MCG, bus = MCG/2, FlexBus = MCG/2, Flash clock= MCG/4
SIM_CLKDIV1 = SIM_CLKDIV1_OUTDIV1(0) | SIM_CLKDIV1_OUTDIV2(1)
               | SIM_CLKDIV1_OUTDIV3(1) | SIM_CLKDIV1_OUTDIV4(3);

//从新存FMC_PFAPR的原始值
FMC_PFAPR = temp_reg;

//设置VCO分频器，使能PLL为100MHz, LOLIE=0, PLLS=1, CME=0, VDIV=26
MCG_C6 = MCG_C6_PLLS_MASK | MCG_C6_VDIV(6);  //VDIV = 31 (x55)
                                                //VDIV = 26 (x50)
   //VDIV = 6 (x30)
while (!(MCG_S & MCG_S_PLLST_MASK)){}; // wait for PLL status bit to set
while (!(MCG_S & MCG_S_LOCK_MASK)){}; // Wait for LOCK bit to set

//进入PBE模式
//通过清零CLKS位来进入PEE模式
// CLKS=0, FRDIV=3, IREFS=0, IRCLKEN=0, IREFSTEN=0
MCG_C1 &= ~MCG_C1_CLKS_MASK;

//等待时钟状态位更新
while (((MCG_S & MCG_S_CLKST_MASK) >> MCG_S_CLKST_SHIFT) != 0x3){};
//SIM_CLKDIV2 |= SIM_CLKDIV2_USBDIV(1);

      //设置跟踪时钟为内核时钟
SIM_SOPT2 |= SIM_SOPT2_TRACECLKSEL_MASK;
//在PTA6引脚上使能TRACE_CLKOU功能
PORTA_PCR6 = ( PORT_PCR_MUX(0x7));
//使能FlexBus模块时钟
SIM_SCGC7 |= SIM_SCGC7_FLEXBUS_MASK;
//在PTA6引脚上使能FB_CLKOUT功能
PORTC_PCR3 = ( PORT_PCR_MUX(0x5));
}